Different threshold voltage levels map to different bits in nonvolatile memories. Due to noise, the actual threshold voltage levels for each state within a group of cells follow a distribution. Controllers of the nonvolatile memory will model the threshold voltage distribution of each state. Conventional controllers use a parametric model for a “flash channel”. The flash channel parameters change with use conditions, such as program/erase cycles and retention. Therefore, the controllers track the channel parameters over time. However, the tracking operations consume bandwidth to the memory and utilize storage space for maintaining the channel parameters.
With aggressive scaling down of process technologies, the raw bit error rate (BER) of conventional NAND flash memories is becoming less reliable. To maintain the same level of reliability previously achieved before scaling down, Solid State Drive (SSD) controllers are adopting soft decoded error correction codes, such as low density parity check (LDPC) codes. Such codes are powerful in correcting errors, but need the input to the decoder to be a soft decision of the flash channels. A soft decision normally takes the form of log-likelihood ratio (LLR). In order to obtain a high quality of a soft decision, multiple reads, often with varying read voltages, are necessary.
It would be desirable to implement the management of non-valid decision patterns of soft read retry.